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| RF3394 0 Typical Applications * Basestation Applications * Broadband, Low-Noise Gain Blocks * IF or RF Buffer Amplifiers Product Description The RF3394 is a general purpose, low-cost RF amplifier IC. The device is manufactured on an advanced Gallium Arsenide Heterojunction Bipolar Transistor (HBT) process, and has been designed for use as an easily-cascadable 50 gain block. Applications include IF and RF amplification in wireless voice and data communication products operating in frequency bands up to 6000MHz. The device is self-contained with 50 input and output impedances and requires only two external DC-biasing elements to operate as specified. The device is designed for cost effective high reliability in a plastic package. The 3mmx3mm footprint is compatible with standard ceramic and plastic Micro-X packages. 2 PLCS 0.10 C A GENERAL PURPOSE AMPLIFIER * Driver Stage for Power Amplifiers * Final PA for Low-Power Applications * High Reliability Applications 0.05 C -A3 1 3.00 2 PLCS 0.10 C B 0.20 REF. 0.90 0.85 0.05 0.00 3.00 0.10 C B 2 PLCS 12 MAX SEATING PLANE 0.10 C A 2 PLCS 2.75 SQ -B- Dimensions in mm. -C- Shaded lead is pin 1. 0.10 M C A B 0.60 0.24 TYP 0.35 0.30 PIN 1 ID R0.20 1.90 1.60 0.45 0.35 0.375 0.275 1.15 0.85 0.65 Optimum Technology Matching(R) Applied Si BJT Si Bi-CMOS InGaP/HBT GaAs HBT SiGe HBT GaN HEMT GaAs MESFET Si CMOS SiGe Bi-CMOS Package Style: QFN, 12-Pin, 3x3 Features * DC to >6000MHz Operation * Internally Matched Input and Output * 20dB Small Signal Gain GND GND GND * +32dBm Output IP3 * +18dBm Output Power 9 NC 8 RF OUT 7 NC 12 NC 1 RF IN 2 NC 3 4 GND 11 10 * Footprint Compatible with Micro-X 5 GND 6 GND Ordering Information RF3394 RF3394 PCBA General Purpose Amplifier Fully Assembled Evaluation Board Functional Block Diagram RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com Rev A12 040224 4-583 RF3394 Absolute Maximum Ratings Parameter Input RF Power Operating Ambient Temperature Storage Temperature Rating +13 -40 to +85 -60 to +150 Unit dBm C C Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). Parameter Overall Frequency Range 3dB Bandwidth Gain Specification Min. Typ. Max. DC to >6000 3 20.2 20.0 18.7 16.7 15.7 12.1 3.5 <1.8:1 <1.25:1 <2.2:1 <2.0:1 <1.35:1 <1.8:1 +32.0 +17.5 22.0 147 139 Unit MHz GHz dB dB dB dB Condition T=25 C, ICC =65mA (See Note 1.) 18.7 18.5 17.0 21.0 22.0 Noise Figure Input VSWR dB Output VSWR Output IP3 Output P1dB Reverse Isolation +29.0 dBm dBm dB C/W C Thermal ThetaJC Maximum Measured Junction Temperature at DC Bias Conditions Mean Time To Failure Freq=500MHz Freq=850MHz Freq=2000MHz Freq=3000MHz Freq=4000MHz Freq=6000MHz Freq=2000MHz In a 50 system, <500MHz In a 50 system, 500MHz to 5000MHz In a 50 system, 5000MHz to 6000MHz In a 50 system, <500MHz In a 50 system, 500MHz to 4000MHz In a 50 system, 4000MHz to 6000MHz Freq=2000MHz Freq=2000MHz Freq=2000MHz ICC =65mA, PDISS =274mW. (See Note 3.) VPIN =4.2V TAMB =+85C TAMB =+85C With 22 bias resistor Power Supply Device Operating Voltage 4.4 4.5 4.6 V At pin 8 with ICC =65mA 5.5 5.9 6.5 V At evaluation board connectors, ICC =65mA Operating Current 80 mA See Note 2. Note 1: All specification and characterization data has been gathered on standard FR-4 evaluation boards. These evaluation boards are not optimized for frequencies above 2.5GHz. Performance above 2.5GHz may improve if a high performance PCB is used. Note 2: The RF3398 must be operated at or below 80mA in order to achieve the thermal performance listed above. While the RF3398 may be operated at higher bias currents, 65mA is the recommended bias to ensure the highest possible reliability and electrical performance. Note 3: Because of process variations from part to part, the current resulting from a fixed bias voltage will vary. As a result, caution should be used in designing fixed voltage bias circuits to ensure the worst case bias current does not exceed 80mA over all intended operating conditions. 3065 years 4-584 Rev A12 040224 RF3394 Pin 1 2 Function NC RF IN Description No internal connections. It is not necessary to ground this pin. RF input pin. This pin is NOT internally DC blocked. A DC blocking capacitor, suitable for the frequency of operation, should be used in most applications. DC coupling of the input is not allowed, because this will override the internal feedback loop and cause temperature instability. No internal connections. It is not necessary to ground this pin. Ground connection. Ground connection. Ground connection. No internal connections. It is not necessary to ground this pin. RF output and bias pin. Biasing is accomplished with an external series resistor and choke inductor to VCC. The resistor is selected to set the DC current into this pin to a desired level. The resistor value is determined by the following equation: RF OUT Interface Schematic 3 4 5 6 7 8 NC GND GND GND NC RF OUT ( V SUPPLY - V DEVICE ) R = -----------------------------------------------------I CC Because DC is present on this pin, a DC blocking capacitor, suitable for the frequency of operation, should be used in most applications. The supply side of the bias network should also be well bypassed. RF IN 9 10 11 12 Die Flag NC GND GND GND GND No internal connections. It is not necessary to ground this pin. Ground connection. Ground connection. Ground connection. Ground connection. To ensure best performance, avoid placing ground vias directly beneath the part. Rev A12 040224 4-585 RF3394 Application Schematic VCC 10 nF 22 pF 47 nH 12 1 22 pF RF IN 2 3 4 5 6 8 22 pF 7 11 10 9 RBIAS RF OUT Evaluation Board Schematic (Download Bill of Materials from www.rfmd.com.) P1 P1-1 1 2 P1-3 3 CON3 12 C1 100 pF 1 2 3 4 5 6 11 10 9 8 7 VCC GND NC R1 22 L1 100 nH C3 100 pF C4 1 F VCC P1-1 J1 RF IN 50 strip C2 100 pF 50 strip J2 RF OUT NOTE: Evaluation board optimized for frequencies above 300 MHz and below 2.5 GHz. For operation below 300 MHz the value of inductor L1 and capcitors C1 and C2 should be increased. 4-586 Rev A12 040224 RF3394 Evaluation Board Layout Board Size 1.195" x 1.000" Board Thickness 0.033", Board Material FR-4 Note: A small amount of ground inductance is required to achieve datasheet performance. The necessary inductance may be generated by ensuring that no ground vias are placed directly below the footprint of the part. Overlay of Suggested Micro-X and 3mmx3mm Layouts Showing Compatibility Rev A12 040224 4-587 RF3394 Gain versus Frequency Across Temperature (ICC = 65 mA) -40C 20.0 25C 85C 18.0 18.0 19.0 20.0 Output P1dB versus Frequency Across Temperature (ICC=65mA) -40C 25C 85C Output Power (dBm) 17.0 Gain (dB) 16.0 16.0 14.0 15.0 14.0 12.0 13.0 10.0 0.0 1000.0 2000.0 3000.0 4000.0 5000.0 6000.0 12.0 0.0 500.0 1000.0 1500.0 2000.0 2500.0 3000.0 3500.0 4000.0 Frequency (MHz) Frequency (MHz) 36.0 Output IP3 versus Frequency Across Temperature (ICC=65mA) -40C Noise Figure versus Frequency Across Temperature 6.0 (ICC = 65 mA) -40C 34.0 25C 85C 5.5 25C 85C 32.0 5.0 30.0 Noise Figure (dB) 4.5 OIP3 (dBm) 28.0 4.0 26.0 3.5 24.0 3.0 22.0 2.5 20.0 0.0 500.0 1000.0 1500.0 2000.0 2500.0 3000.0 3500.0 4000.0 2.0 0.0 500.0 1000.0 1500.0 2000.0 2500.0 3000.0 Frequency (MHz) Frequency (dB) Input VSWR versus Frequency Across Temperature 2.8 -40C 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.0 1000.0 2000.0 3000.0 4000.0 5000.0 6000.0 25C 85C 1.7 1.6 1.5 1.4 1.3 1.2 1.8 Output VSWR versus Frequency Across Temperature 1.9 (ICC = 65 mA) (ICC = 65 mA) VSWR VSWR -40C 1.1 1.0 0.0 1000.0 2000.0 3000.0 4000.0 5000.0 6000.0 25C 85C Frequency (MHz) Frequency (MHz) 4-588 Rev A12 040224 RF3394 23.0 Reverse Isolation versus Frequency Across Temperature (ICC = 65 mA) Current versus Voltage 90.0 (At evaluation board connector, R BIAS = 22) 80.0 22.0 70.0 Reverse Isolation (dB) 21.0 60.0 ICC (mA) 20.0 50.0 40.0 19.0 30.0 18.0 -40C 25C 85C 17.0 0.0 1000.0 2000.0 3000.0 4000.0 5000.0 6000.0 -40C 20.0 +25C +85C 10.0 4.5 5.0 5.5 6.0 6.5 Frequency (MHz) VCC (V) Current versus Voltage (At Pin 8 of the RF3394) 80.0 0.40 Power Dissipated versus Voltage at Pin 8 (TAMBIENT = +85C) 70.0 0.35 0.30 60.0 Power Dissipated (W) -40C +25C +85C 4.0 4.1 4.2 4.3 4.4 4.5 4.6 0.25 ICC (mA) 50.0 0.20 40.0 0.15 30.0 0.10 20.0 0.05 10.0 0.00 4.00 4.10 4.20 4.30 4.40 4.50 4.60 VP IN (V) VPIN (V) Junction Temperature versus Power Dissipated 165.00 (TAMBIENT = +85C) 160.00 Junction Temperature ( oC) 155.00 150.00 145.00 140.00 135.00 130.00 125.00 0.22 0.24 0.26 0.28 0.30 0.32 0.34 Power Dissipated (Watts) Rev A12 040224 4-589 RF3394 PCB Design Requirements PCB Surface Finish The PCB surface finish used for RFMD's qualification process is Electroless Nickel, immersion Gold. Typical thickness is 3inch to 8inch Gold over 180inch Nickel. PCB Land Pattern Recommendation PCB land patterns are based on IPC-SM-782 standards when possible. The pad pattern shown has been developed and tested for optimized assembly at RFMD; however, it may require some modifications to address company specific assembly processes. The PCB land pattern has been developed to accommodate lead and package tolerances. PCB Metal Land Mask Pattern A = 0.59 x 0.32 (mm) Typ. 0.80 (mm) Typ. 1.00 (mm) 0.40 (mm) Typ. Pin 1 0.70 (mm) 1.00 (mm) Typ. Typ. A A A A 2.20 (mm) Typ. 3.20 (mm) Typ. 0.65 (mm) Typ. 0.95 (mm) Typ. A A 0.30 (mm) Typ. 0.65 (mm) Typ. 1.30 (mm) Typ. 2.60 (mm) Figure 1. PCB Metal Land Pattern (Top View) 4-590 Rev A12 040224 RF3394 PCB Solder Mask Pattern Liquid Photo-Imageable (LPI) solder mask is recommended. The solder mask footprint will match what is shown for the PCB metal land pattern with a 2mil to 3mil expansion to accommodate solder mask registration clearance around all pads. The center-grounding pad shall also have a solder mask clearance. Expansion of the pads to create solder mask clearance can be provided in the master data or requested from the PCB fabrication supplier. A = 0.72 x 0.45 (mm) Typ. 0.72 (mm) Typ. 1.15 (mm) 0.41 (mm) Typ. Pin 1 0.75 (mm) Typ. 1.05 (mm) Typ. A A A A 2.27 (mm) Typ. 3.32 (mm) Typ. 0.65 (mm) Typ. 1.01 (mm) Typ. A A 0.45 (mm) Typ. 0.65 (mm) Typ. 1.30 (mm) Typ. 2.60 (mm) Figure 2. PCB Solder Mask (Top View) Thermal Pad and Via Design The PCB metal land pattern has been designed with a thermal pad that matches the exposed die paddle size on the bottom of the device. Thermal vias are required in the PCB layout to effectively conduct heat away from the package. The via pattern has been designed to address thermal, power dissipation and electrical requirements of the device as well as accommodating routing strategies. The via pattern used for the RFMD qualification is based on thru-hole vias with 0.203mm to 0.330mm finished hole size on a 0.5mm to 1.2mm grid pattern with 0.025mm plating on via walls. If micro vias are used in a design, it is suggested that the quantity of vias be increased by a 4:1 ratio to achieve similar results. NOTE: A small amount of ground inductance is required to achieve data sheet performance. The necessary inductance may be generated by ensuring that no ground vias are placed directly below the footprint of the part. Rev A12 040224 4-591 RF3394 4-592 Rev A12 040224 |
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